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https://github.com/bjoernellens1/cps_microros_imu.git
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1005 lines
31 KiB
C
1005 lines
31 KiB
C
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// /* Encoder Library, for measuring quadrature encoded signals
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// * http://www.pjrc.com/teensy/td_libs_Encoder.html
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// * Copyright (c) 2011,2013 PJRC.COM, LLC - Paul Stoffregen <paul@pjrc.com>
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// *
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// * Version 1.2 - fix -2 bug in C-only code
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// * Version 1.1 - expand to support boards with up to 60 interrupts
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// * Version 1.0 - initial release
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// *
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// * Permission is hereby granted, free of charge, to any person obtaining a copy
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// * of this software and associated documentation files (the "Software"), to deal
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// * in the Software without restriction, including without limitation the rights
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// * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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// * copies of the Software, and to permit persons to whom the Software is
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// * furnished to do so, subject to the following conditions:
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// *
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// * The above copyright notice and this permission notice shall be included in
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// * all copies or substantial portions of the Software.
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// *
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// * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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// * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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// * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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// * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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// * THE SOFTWARE.
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// */
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// #ifndef Encoder_h_
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// #define Encoder_h_
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// #if defined(ARDUINO) && ARDUINO >= 100
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// #include "Arduino.h"
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// #elif defined(WIRING)
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// #include "Wiring.h"
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// #else
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// #include "WProgram.h"
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// #include "pins_arduino.h"
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// #endif
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// #include "utility/direct_pin_read.h"
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// #if defined(ENCODER_USE_INTERRUPTS) || !defined(ENCODER_DO_NOT_USE_INTERRUPTS)
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// #define ENCODER_USE_INTERRUPTS
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// #define ENCODER_ARGLIST_SIZE CORE_NUM_INTERRUPT
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// #include "utility/interrupt_pins.h"
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// #ifdef ENCODER_OPTIMIZE_INTERRUPTS
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// #include "utility/interrupt_config.h"
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// #endif
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// #else
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// #define ENCODER_ARGLIST_SIZE 0
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// #endif
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// // Use ICACHE_RAM_ATTR for ISRs to prevent ESP8266 resets
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// #if defined(ESP8266) || defined(ESP32)
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// #define ENCODER_ISR_ATTR ICACHE_RAM_ATTR
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// #else
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// #define ENCODER_ISR_ATTR
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// #endif
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// // All the data needed by interrupts is consolidated into this ugly struct
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// // to facilitate assembly language optimizing of the speed critical update.
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// // The assembly code uses auto-incrementing addressing modes, so the struct
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// // must remain in exactly this order.
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// typedef struct {
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// volatile IO_REG_TYPE * pin1_register;
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// volatile IO_REG_TYPE * pin2_register;
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// IO_REG_TYPE pin1_bitmask;
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// IO_REG_TYPE pin2_bitmask;
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// uint8_t state;
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// int32_t position;
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// } Encoder_internal_state_t;
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// class Encoder
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// {
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// public:
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// Encoder(uint8_t pin1, uint8_t pin2, int counts_per_rev, bool invert=false) {
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// uint8_t temp_pin = pin1;
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// if(invert)
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// {
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// pin1 = pin2;
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// pin2 = temp_pin;
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// }
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// #ifdef INPUT_PULLUP
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// pinMode(pin1, INPUT_PULLUP);
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// pinMode(pin2, INPUT_PULLUP);
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// #else
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// pinMode(pin1, INPUT);
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// digitalWrite(pin1, HIGH);
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// pinMode(pin2, INPUT);
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// digitalWrite(pin2, HIGH);
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// #endif
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// counts_per_rev_ = counts_per_rev;
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// encoder.pin1_register = PIN_TO_BASEREG(pin1);
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// encoder.pin1_bitmask = PIN_TO_BITMASK(pin1);
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// encoder.pin2_register = PIN_TO_BASEREG(pin2);
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// encoder.pin2_bitmask = PIN_TO_BITMASK(pin2);
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// encoder.position = 0;
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// // allow time for a passive R-C filter to charge
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// // through the pullup resistors, before reading
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// // the initial state
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// delayMicroseconds(2000);
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// uint8_t s = 0;
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// if (DIRECT_PIN_READ(encoder.pin1_register, encoder.pin1_bitmask)) s |= 1;
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// if (DIRECT_PIN_READ(encoder.pin2_register, encoder.pin2_bitmask)) s |= 2;
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// encoder.state = s;
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// #ifdef ENCODER_USE_INTERRUPTS
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// interrupts_in_use = attach_interrupt(pin1, &encoder);
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// interrupts_in_use += attach_interrupt(pin2, &encoder);
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// #endif
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// //update_finishup(); // to force linker to include the code (does not work)
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// }
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// #ifdef ENCODER_USE_INTERRUPTS
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// inline int32_t read() {
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// if (interrupts_in_use < 2) {
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// noInterrupts();
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// update(&encoder);
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// } else {
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// noInterrupts();
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// }
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// int32_t ret = encoder.position;
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// interrupts();
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// return ret;
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// }
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// inline int32_t readAndReset() {
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// if (interrupts_in_use < 2) {
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// noInterrupts();
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// update(&encoder);
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// } else {
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// noInterrupts();
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// }
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// int32_t ret = encoder.position;
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// encoder.position = 0;
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// interrupts();
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// return ret;
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// }
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// inline void write(int32_t p) {
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// noInterrupts();
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// encoder.position = p;
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// interrupts();
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// }
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// #else
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// inline int32_t read() {
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// update(&encoder);
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// return encoder.position;
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// }
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// inline int32_t readAndReset() {
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// update(&encoder);
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// int32_t ret = encoder.position;
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// encoder.position = 0;
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// return ret;
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// }
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// inline void write(int32_t p) {
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// encoder.position = p;
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// }
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// #endif
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// float getRPM(){
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// long encoder_ticks = read();
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// //this function calculates the motor's RPM based on encoder ticks and delta time
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// unsigned long current_time = micros();
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// unsigned long dt = current_time - prev_update_time_;
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// //convert the time from milliseconds to minutes
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// double dtm = (double)dt / 60000000;
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// double delta_ticks = encoder_ticks - prev_encoder_ticks_;
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// //calculate wheel's speed (RPM)
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// prev_update_time_ = current_time;
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// prev_encoder_ticks_ = encoder_ticks;
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// return ((delta_ticks / counts_per_rev_) / dtm);
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// }
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// private:
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// int counts_per_rev_;
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// unsigned long prev_update_time_;
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// long prev_encoder_ticks_;
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// Encoder_internal_state_t encoder;
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// #ifdef ENCODER_USE_INTERRUPTS
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// uint8_t interrupts_in_use;
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// #endif
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// public:
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// static Encoder_internal_state_t * interruptArgs[ENCODER_ARGLIST_SIZE];
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// // _______ _______
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// // Pin1 ______| |_______| |______ Pin1
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// // negative <--- _______ _______ __ --> positive
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// // Pin2 __| |_______| |_______| Pin2
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// // new new old old
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// // pin2 pin1 pin2 pin1 Result
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// // ---- ---- ---- ---- ------
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// // 0 0 0 0 no movement
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// // 0 0 0 1 +1
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// // 0 0 1 0 -1
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// // 0 0 1 1 +2 (assume pin1 edges only)
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// // 0 1 0 0 -1
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// // 0 1 0 1 no movement
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// // 0 1 1 0 -2 (assume pin1 edges only)
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// // 0 1 1 1 +1
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// // 1 0 0 0 +1
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// // 1 0 0 1 -2 (assume pin1 edges only)
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// // 1 0 1 0 no movement
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// // 1 0 1 1 -1
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// // 1 1 0 0 +2 (assume pin1 edges only)
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// // 1 1 0 1 -1
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// // 1 1 1 0 +1
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// // 1 1 1 1 no movement
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// /*
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// // Simple, easy-to-read "documentation" version :-)
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// //
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// void update(void) {
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// uint8_t s = state & 3;
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// if (digitalRead(pin1)) s |= 4;
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// if (digitalRead(pin2)) s |= 8;
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// switch (s) {
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// case 0: case 5: case 10: case 15:
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// break;
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// case 1: case 7: case 8: case 14:
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// position++; break;
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// case 2: case 4: case 11: case 13:
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// position--; break;
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// case 3: case 12:
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// position += 2; break;
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// default:
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// position -= 2; break;
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// }
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// state = (s >> 2);
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// }
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// */
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// public:
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// // update() is not meant to be called from outside Encoder,
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// // but it is public to allow static interrupt routines.
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// // DO NOT call update() directly from sketches.
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// static void update(Encoder_internal_state_t *arg) {
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// #if defined(__AVR__)
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// // The compiler believes this is just 1 line of code, so
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// // it will inline this function into each interrupt
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// // handler. That's a tiny bit faster, but grows the code.
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// // Especially when used with ENCODER_OPTIMIZE_INTERRUPTS,
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// // the inline nature allows the ISR prologue and epilogue
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// // to only save/restore necessary registers, for very nice
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// // speed increase.
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// asm volatile (
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// "ld r30, X+" "\n\t"
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// "ld r31, X+" "\n\t"
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// "ld r24, Z" "\n\t" // r24 = pin1 input
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// "ld r30, X+" "\n\t"
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// "ld r31, X+" "\n\t"
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// "ld r25, Z" "\n\t" // r25 = pin2 input
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// "ld r30, X+" "\n\t" // r30 = pin1 mask
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// "ld r31, X+" "\n\t" // r31 = pin2 mask
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// "ld r22, X" "\n\t" // r22 = state
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// "andi r22, 3" "\n\t"
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// "and r24, r30" "\n\t"
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// "breq L%=1" "\n\t" // if (pin1)
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// "ori r22, 4" "\n\t" // state |= 4
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// "L%=1:" "and r25, r31" "\n\t"
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// "breq L%=2" "\n\t" // if (pin2)
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// "ori r22, 8" "\n\t" // state |= 8
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// "L%=2:" "ldi r30, lo8(pm(L%=table))" "\n\t"
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// "ldi r31, hi8(pm(L%=table))" "\n\t"
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// "add r30, r22" "\n\t"
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// "adc r31, __zero_reg__" "\n\t"
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// "asr r22" "\n\t"
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// "asr r22" "\n\t"
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// "st X+, r22" "\n\t" // store new state
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// "ld r22, X+" "\n\t"
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// "ld r23, X+" "\n\t"
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// "ld r24, X+" "\n\t"
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// "ld r25, X+" "\n\t"
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// "ijmp" "\n\t" // jumps to update_finishup()
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// // TODO move this table to another static function,
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// // so it doesn't get needlessly duplicated. Easier
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// // said than done, due to linker issues and inlining
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// "L%=table:" "\n\t"
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// "rjmp L%=end" "\n\t" // 0
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// "rjmp L%=plus1" "\n\t" // 1
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// "rjmp L%=minus1" "\n\t" // 2
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// "rjmp L%=plus2" "\n\t" // 3
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// "rjmp L%=minus1" "\n\t" // 4
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// "rjmp L%=end" "\n\t" // 5
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// "rjmp L%=minus2" "\n\t" // 6
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// "rjmp L%=plus1" "\n\t" // 7
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// "rjmp L%=plus1" "\n\t" // 8
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// "rjmp L%=minus2" "\n\t" // 9
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// "rjmp L%=end" "\n\t" // 10
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// "rjmp L%=minus1" "\n\t" // 11
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// "rjmp L%=plus2" "\n\t" // 12
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// "rjmp L%=minus1" "\n\t" // 13
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// "rjmp L%=plus1" "\n\t" // 14
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// "rjmp L%=end" "\n\t" // 15
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// "L%=minus2:" "\n\t"
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// "subi r22, 2" "\n\t"
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// "sbci r23, 0" "\n\t"
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// "sbci r24, 0" "\n\t"
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// "sbci r25, 0" "\n\t"
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// "rjmp L%=store" "\n\t"
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// "L%=minus1:" "\n\t"
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// "subi r22, 1" "\n\t"
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// "sbci r23, 0" "\n\t"
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// "sbci r24, 0" "\n\t"
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// "sbci r25, 0" "\n\t"
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// "rjmp L%=store" "\n\t"
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// "L%=plus2:" "\n\t"
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// "subi r22, 254" "\n\t"
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// "rjmp L%=z" "\n\t"
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// "L%=plus1:" "\n\t"
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// "subi r22, 255" "\n\t"
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// "L%=z:" "sbci r23, 255" "\n\t"
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// "sbci r24, 255" "\n\t"
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// "sbci r25, 255" "\n\t"
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// "L%=store:" "\n\t"
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// "st -X, r25" "\n\t"
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// "st -X, r24" "\n\t"
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// "st -X, r23" "\n\t"
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// "st -X, r22" "\n\t"
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// "L%=end:" "\n"
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// : : "x" (arg) : "r22", "r23", "r24", "r25", "r30", "r31");
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// #else
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// uint8_t p1val = DIRECT_PIN_READ(arg->pin1_register, arg->pin1_bitmask);
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// uint8_t p2val = DIRECT_PIN_READ(arg->pin2_register, arg->pin2_bitmask);
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// uint8_t state = arg->state & 3;
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// if (p1val) state |= 4;
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// if (p2val) state |= 8;
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// arg->state = (state >> 2);
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// switch (state) {
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// case 1: case 7: case 8: case 14:
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// arg->position++;
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// return;
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// case 2: case 4: case 11: case 13:
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// arg->position--;
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// return;
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// case 3: case 12:
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// arg->position += 2;
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// return;
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// case 6: case 9:
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// arg->position -= 2;
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// return;
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// }
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// #endif
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// }
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// private:
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// /*
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// #if defined(__AVR__)
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// // TODO: this must be a no inline function
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// // even noinline does not seem to solve difficult
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// // problems with this. Oh well, it was only meant
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// // to shrink code size - there's no performance
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// // improvement in this, only code size reduction.
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// __attribute__((noinline)) void update_finishup(void) {
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// asm volatile (
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// "ldi r30, lo8(pm(Ltable))" "\n\t"
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// "ldi r31, hi8(pm(Ltable))" "\n\t"
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// "Ltable:" "\n\t"
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// "rjmp L%=end" "\n\t" // 0
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// "rjmp L%=plus1" "\n\t" // 1
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// "rjmp L%=minus1" "\n\t" // 2
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// "rjmp L%=plus2" "\n\t" // 3
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// "rjmp L%=minus1" "\n\t" // 4
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// "rjmp L%=end" "\n\t" // 5
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// "rjmp L%=minus2" "\n\t" // 6
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// "rjmp L%=plus1" "\n\t" // 7
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// "rjmp L%=plus1" "\n\t" // 8
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// "rjmp L%=minus2" "\n\t" // 9
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// "rjmp L%=end" "\n\t" // 10
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// "rjmp L%=minus1" "\n\t" // 11
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// "rjmp L%=plus2" "\n\t" // 12
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||
|
// "rjmp L%=minus1" "\n\t" // 13
|
||
|
// "rjmp L%=plus1" "\n\t" // 14
|
||
|
// "rjmp L%=end" "\n\t" // 15
|
||
|
// "L%=minus2:" "\n\t"
|
||
|
// "subi r22, 2" "\n\t"
|
||
|
// "sbci r23, 0" "\n\t"
|
||
|
// "sbci r24, 0" "\n\t"
|
||
|
// "sbci r25, 0" "\n\t"
|
||
|
// "rjmp L%=store" "\n\t"
|
||
|
// "L%=minus1:" "\n\t"
|
||
|
// "subi r22, 1" "\n\t"
|
||
|
// "sbci r23, 0" "\n\t"
|
||
|
// "sbci r24, 0" "\n\t"
|
||
|
// "sbci r25, 0" "\n\t"
|
||
|
// "rjmp L%=store" "\n\t"
|
||
|
// "L%=plus2:" "\n\t"
|
||
|
// "subi r22, 254" "\n\t"
|
||
|
// "rjmp L%=z" "\n\t"
|
||
|
// "L%=plus1:" "\n\t"
|
||
|
// "subi r22, 255" "\n\t"
|
||
|
// "L%=z:" "sbci r23, 255" "\n\t"
|
||
|
// "sbci r24, 255" "\n\t"
|
||
|
// "sbci r25, 255" "\n\t"
|
||
|
// "L%=store:" "\n\t"
|
||
|
// "st -X, r25" "\n\t"
|
||
|
// "st -X, r24" "\n\t"
|
||
|
// "st -X, r23" "\n\t"
|
||
|
// "st -X, r22" "\n\t"
|
||
|
// "L%=end:" "\n"
|
||
|
// : : : "r22", "r23", "r24", "r25", "r30", "r31");
|
||
|
// }
|
||
|
// #endif
|
||
|
// */
|
||
|
|
||
|
|
||
|
// #ifdef ENCODER_USE_INTERRUPTS
|
||
|
// // this giant function is an unfortunate consequence of Arduino's
|
||
|
// // attachInterrupt function not supporting any way to pass a pointer
|
||
|
// // or other context to the attached function.
|
||
|
// static uint8_t attach_interrupt(uint8_t pin, Encoder_internal_state_t *state) {
|
||
|
// switch (pin) {
|
||
|
// #ifdef CORE_INT0_PIN
|
||
|
// case CORE_INT0_PIN:
|
||
|
// interruptArgs[0] = state;
|
||
|
// attachInterrupt(0, isr0, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT1_PIN
|
||
|
// case CORE_INT1_PIN:
|
||
|
// interruptArgs[1] = state;
|
||
|
// attachInterrupt(1, isr1, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT2_PIN
|
||
|
// case CORE_INT2_PIN:
|
||
|
// interruptArgs[2] = state;
|
||
|
// attachInterrupt(2, isr2, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT3_PIN
|
||
|
// case CORE_INT3_PIN:
|
||
|
// interruptArgs[3] = state;
|
||
|
// attachInterrupt(3, isr3, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT4_PIN
|
||
|
// case CORE_INT4_PIN:
|
||
|
// interruptArgs[4] = state;
|
||
|
// attachInterrupt(4, isr4, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT5_PIN
|
||
|
// case CORE_INT5_PIN:
|
||
|
// interruptArgs[5] = state;
|
||
|
// attachInterrupt(5, isr5, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT6_PIN
|
||
|
// case CORE_INT6_PIN:
|
||
|
// interruptArgs[6] = state;
|
||
|
// attachInterrupt(6, isr6, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT7_PIN
|
||
|
// case CORE_INT7_PIN:
|
||
|
// interruptArgs[7] = state;
|
||
|
// attachInterrupt(7, isr7, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT8_PIN
|
||
|
// case CORE_INT8_PIN:
|
||
|
// interruptArgs[8] = state;
|
||
|
// attachInterrupt(8, isr8, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT9_PIN
|
||
|
// case CORE_INT9_PIN:
|
||
|
// interruptArgs[9] = state;
|
||
|
// attachInterrupt(9, isr9, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT10_PIN
|
||
|
// case CORE_INT10_PIN:
|
||
|
// interruptArgs[10] = state;
|
||
|
// attachInterrupt(10, isr10, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT11_PIN
|
||
|
// case CORE_INT11_PIN:
|
||
|
// interruptArgs[11] = state;
|
||
|
// attachInterrupt(11, isr11, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT12_PIN
|
||
|
// case CORE_INT12_PIN:
|
||
|
// interruptArgs[12] = state;
|
||
|
// attachInterrupt(12, isr12, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT13_PIN
|
||
|
// case CORE_INT13_PIN:
|
||
|
// interruptArgs[13] = state;
|
||
|
// attachInterrupt(13, isr13, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT14_PIN
|
||
|
// case CORE_INT14_PIN:
|
||
|
// interruptArgs[14] = state;
|
||
|
// attachInterrupt(14, isr14, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT15_PIN
|
||
|
// case CORE_INT15_PIN:
|
||
|
// interruptArgs[15] = state;
|
||
|
// attachInterrupt(15, isr15, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT16_PIN
|
||
|
// case CORE_INT16_PIN:
|
||
|
// interruptArgs[16] = state;
|
||
|
// attachInterrupt(16, isr16, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT17_PIN
|
||
|
// case CORE_INT17_PIN:
|
||
|
// interruptArgs[17] = state;
|
||
|
// attachInterrupt(17, isr17, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT18_PIN
|
||
|
// case CORE_INT18_PIN:
|
||
|
// interruptArgs[18] = state;
|
||
|
// attachInterrupt(18, isr18, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT19_PIN
|
||
|
// case CORE_INT19_PIN:
|
||
|
// interruptArgs[19] = state;
|
||
|
// attachInterrupt(19, isr19, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT20_PIN
|
||
|
// case CORE_INT20_PIN:
|
||
|
// interruptArgs[20] = state;
|
||
|
// attachInterrupt(20, isr20, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT21_PIN
|
||
|
// case CORE_INT21_PIN:
|
||
|
// interruptArgs[21] = state;
|
||
|
// attachInterrupt(21, isr21, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT22_PIN
|
||
|
// case CORE_INT22_PIN:
|
||
|
// interruptArgs[22] = state;
|
||
|
// attachInterrupt(22, isr22, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT23_PIN
|
||
|
// case CORE_INT23_PIN:
|
||
|
// interruptArgs[23] = state;
|
||
|
// attachInterrupt(23, isr23, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT24_PIN
|
||
|
// case CORE_INT24_PIN:
|
||
|
// interruptArgs[24] = state;
|
||
|
// attachInterrupt(24, isr24, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT25_PIN
|
||
|
// case CORE_INT25_PIN:
|
||
|
// interruptArgs[25] = state;
|
||
|
// attachInterrupt(25, isr25, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT26_PIN
|
||
|
// case CORE_INT26_PIN:
|
||
|
// interruptArgs[26] = state;
|
||
|
// attachInterrupt(26, isr26, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT27_PIN
|
||
|
// case CORE_INT27_PIN:
|
||
|
// interruptArgs[27] = state;
|
||
|
// attachInterrupt(27, isr27, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT28_PIN
|
||
|
// case CORE_INT28_PIN:
|
||
|
// interruptArgs[28] = state;
|
||
|
// attachInterrupt(28, isr28, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT29_PIN
|
||
|
// case CORE_INT29_PIN:
|
||
|
// interruptArgs[29] = state;
|
||
|
// attachInterrupt(29, isr29, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
|
||
|
// #ifdef CORE_INT30_PIN
|
||
|
// case CORE_INT30_PIN:
|
||
|
// interruptArgs[30] = state;
|
||
|
// attachInterrupt(30, isr30, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT31_PIN
|
||
|
// case CORE_INT31_PIN:
|
||
|
// interruptArgs[31] = state;
|
||
|
// attachInterrupt(31, isr31, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT32_PIN
|
||
|
// case CORE_INT32_PIN:
|
||
|
// interruptArgs[32] = state;
|
||
|
// attachInterrupt(32, isr32, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT33_PIN
|
||
|
// case CORE_INT33_PIN:
|
||
|
// interruptArgs[33] = state;
|
||
|
// attachInterrupt(33, isr33, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT34_PIN
|
||
|
// case CORE_INT34_PIN:
|
||
|
// interruptArgs[34] = state;
|
||
|
// attachInterrupt(34, isr34, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT35_PIN
|
||
|
// case CORE_INT35_PIN:
|
||
|
// interruptArgs[35] = state;
|
||
|
// attachInterrupt(35, isr35, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT36_PIN
|
||
|
// case CORE_INT36_PIN:
|
||
|
// interruptArgs[36] = state;
|
||
|
// attachInterrupt(36, isr36, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT37_PIN
|
||
|
// case CORE_INT37_PIN:
|
||
|
// interruptArgs[37] = state;
|
||
|
// attachInterrupt(37, isr37, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT38_PIN
|
||
|
// case CORE_INT38_PIN:
|
||
|
// interruptArgs[38] = state;
|
||
|
// attachInterrupt(38, isr38, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT39_PIN
|
||
|
// case CORE_INT39_PIN:
|
||
|
// interruptArgs[39] = state;
|
||
|
// attachInterrupt(39, isr39, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT40_PIN
|
||
|
// case CORE_INT40_PIN:
|
||
|
// interruptArgs[40] = state;
|
||
|
// attachInterrupt(40, isr40, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT41_PIN
|
||
|
// case CORE_INT41_PIN:
|
||
|
// interruptArgs[41] = state;
|
||
|
// attachInterrupt(41, isr41, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT42_PIN
|
||
|
// case CORE_INT42_PIN:
|
||
|
// interruptArgs[42] = state;
|
||
|
// attachInterrupt(42, isr42, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT43_PIN
|
||
|
// case CORE_INT43_PIN:
|
||
|
// interruptArgs[43] = state;
|
||
|
// attachInterrupt(43, isr43, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT44_PIN
|
||
|
// case CORE_INT44_PIN:
|
||
|
// interruptArgs[44] = state;
|
||
|
// attachInterrupt(44, isr44, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT45_PIN
|
||
|
// case CORE_INT45_PIN:
|
||
|
// interruptArgs[45] = state;
|
||
|
// attachInterrupt(45, isr45, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT46_PIN
|
||
|
// case CORE_INT46_PIN:
|
||
|
// interruptArgs[46] = state;
|
||
|
// attachInterrupt(46, isr46, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT47_PIN
|
||
|
// case CORE_INT47_PIN:
|
||
|
// interruptArgs[47] = state;
|
||
|
// attachInterrupt(47, isr47, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT48_PIN
|
||
|
// case CORE_INT48_PIN:
|
||
|
// interruptArgs[48] = state;
|
||
|
// attachInterrupt(48, isr48, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT49_PIN
|
||
|
// case CORE_INT49_PIN:
|
||
|
// interruptArgs[49] = state;
|
||
|
// attachInterrupt(49, isr49, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT50_PIN
|
||
|
// case CORE_INT50_PIN:
|
||
|
// interruptArgs[50] = state;
|
||
|
// attachInterrupt(50, isr50, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT51_PIN
|
||
|
// case CORE_INT51_PIN:
|
||
|
// interruptArgs[51] = state;
|
||
|
// attachInterrupt(51, isr51, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT52_PIN
|
||
|
// case CORE_INT52_PIN:
|
||
|
// interruptArgs[52] = state;
|
||
|
// attachInterrupt(52, isr52, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT53_PIN
|
||
|
// case CORE_INT53_PIN:
|
||
|
// interruptArgs[53] = state;
|
||
|
// attachInterrupt(53, isr53, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT54_PIN
|
||
|
// case CORE_INT54_PIN:
|
||
|
// interruptArgs[54] = state;
|
||
|
// attachInterrupt(54, isr54, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT55_PIN
|
||
|
// case CORE_INT55_PIN:
|
||
|
// interruptArgs[55] = state;
|
||
|
// attachInterrupt(55, isr55, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT56_PIN
|
||
|
// case CORE_INT56_PIN:
|
||
|
// interruptArgs[56] = state;
|
||
|
// attachInterrupt(56, isr56, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT57_PIN
|
||
|
// case CORE_INT57_PIN:
|
||
|
// interruptArgs[57] = state;
|
||
|
// attachInterrupt(57, isr57, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT58_PIN
|
||
|
// case CORE_INT58_PIN:
|
||
|
// interruptArgs[58] = state;
|
||
|
// attachInterrupt(58, isr58, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT59_PIN
|
||
|
// case CORE_INT59_PIN:
|
||
|
// interruptArgs[59] = state;
|
||
|
// attachInterrupt(59, isr59, CHANGE);
|
||
|
// break;
|
||
|
// #endif
|
||
|
// default:
|
||
|
// return 0;
|
||
|
// }
|
||
|
// return 1;
|
||
|
// }
|
||
|
// #endif // ENCODER_USE_INTERRUPTS
|
||
|
|
||
|
|
||
|
// #if defined(ENCODER_USE_INTERRUPTS) && !defined(ENCODER_OPTIMIZE_INTERRUPTS)
|
||
|
// #ifdef CORE_INT0_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr0(void) { update(interruptArgs[0]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT1_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr1(void) { update(interruptArgs[1]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT2_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr2(void) { update(interruptArgs[2]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT3_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr3(void) { update(interruptArgs[3]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT4_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr4(void) { update(interruptArgs[4]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT5_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr5(void) { update(interruptArgs[5]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT6_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr6(void) { update(interruptArgs[6]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT7_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr7(void) { update(interruptArgs[7]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT8_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr8(void) { update(interruptArgs[8]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT9_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr9(void) { update(interruptArgs[9]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT10_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr10(void) { update(interruptArgs[10]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT11_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr11(void) { update(interruptArgs[11]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT12_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr12(void) { update(interruptArgs[12]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT13_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr13(void) { update(interruptArgs[13]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT14_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr14(void) { update(interruptArgs[14]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT15_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr15(void) { update(interruptArgs[15]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT16_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr16(void) { update(interruptArgs[16]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT17_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr17(void) { update(interruptArgs[17]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT18_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr18(void) { update(interruptArgs[18]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT19_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr19(void) { update(interruptArgs[19]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT20_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr20(void) { update(interruptArgs[20]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT21_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr21(void) { update(interruptArgs[21]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT22_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr22(void) { update(interruptArgs[22]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT23_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr23(void) { update(interruptArgs[23]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT24_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr24(void) { update(interruptArgs[24]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT25_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr25(void) { update(interruptArgs[25]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT26_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr26(void) { update(interruptArgs[26]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT27_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr27(void) { update(interruptArgs[27]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT28_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr28(void) { update(interruptArgs[28]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT29_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr29(void) { update(interruptArgs[29]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT30_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr30(void) { update(interruptArgs[30]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT31_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr31(void) { update(interruptArgs[31]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT32_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr32(void) { update(interruptArgs[32]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT33_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr33(void) { update(interruptArgs[33]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT34_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr34(void) { update(interruptArgs[34]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT35_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr35(void) { update(interruptArgs[35]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT36_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr36(void) { update(interruptArgs[36]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT37_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr37(void) { update(interruptArgs[37]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT38_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr38(void) { update(interruptArgs[38]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT39_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr39(void) { update(interruptArgs[39]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT40_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr40(void) { update(interruptArgs[40]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT41_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr41(void) { update(interruptArgs[41]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT42_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr42(void) { update(interruptArgs[42]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT43_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr43(void) { update(interruptArgs[43]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT44_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr44(void) { update(interruptArgs[44]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT45_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr45(void) { update(interruptArgs[45]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT46_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr46(void) { update(interruptArgs[46]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT47_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr47(void) { update(interruptArgs[47]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT48_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr48(void) { update(interruptArgs[48]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT49_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr49(void) { update(interruptArgs[49]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT50_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr50(void) { update(interruptArgs[50]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT51_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr51(void) { update(interruptArgs[51]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT52_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr52(void) { update(interruptArgs[52]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT53_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr53(void) { update(interruptArgs[53]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT54_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr54(void) { update(interruptArgs[54]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT55_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr55(void) { update(interruptArgs[55]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT56_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr56(void) { update(interruptArgs[56]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT57_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr57(void) { update(interruptArgs[57]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT58_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr58(void) { update(interruptArgs[58]); }
|
||
|
// #endif
|
||
|
// #ifdef CORE_INT59_PIN
|
||
|
// static ENCODER_ISR_ATTR void isr59(void) { update(interruptArgs[59]); }
|
||
|
// #endif
|
||
|
// #endif
|
||
|
// };
|
||
|
|
||
|
// #if defined(ENCODER_USE_INTERRUPTS) && defined(ENCODER_OPTIMIZE_INTERRUPTS)
|
||
|
// #if defined(__AVR__)
|
||
|
// #if defined(INT0_vect) && CORE_NUM_INTERRUPT > 0
|
||
|
// ISR(INT0_vect) { Encoder::update(Encoder::interruptArgs[SCRAMBLE_INT_ORDER(0)]); }
|
||
|
// #endif
|
||
|
// #if defined(INT1_vect) && CORE_NUM_INTERRUPT > 1
|
||
|
// ISR(INT1_vect) { Encoder::update(Encoder::interruptArgs[SCRAMBLE_INT_ORDER(1)]); }
|
||
|
// #endif
|
||
|
// #if defined(INT2_vect) && CORE_NUM_INTERRUPT > 2
|
||
|
// ISR(INT2_vect) { Encoder::update(Encoder::interruptArgs[SCRAMBLE_INT_ORDER(2)]); }
|
||
|
// #endif
|
||
|
// #if defined(INT3_vect) && CORE_NUM_INTERRUPT > 3
|
||
|
// ISR(INT3_vect) { Encoder::update(Encoder::interruptArgs[SCRAMBLE_INT_ORDER(3)]); }
|
||
|
// #endif
|
||
|
// #if defined(INT4_vect) && CORE_NUM_INTERRUPT > 4
|
||
|
// ISR(INT4_vect) { Encoder::update(Encoder::interruptArgs[SCRAMBLE_INT_ORDER(4)]); }
|
||
|
// #endif
|
||
|
// #if defined(INT5_vect) && CORE_NUM_INTERRUPT > 5
|
||
|
// ISR(INT5_vect) { Encoder::update(Encoder::interruptArgs[SCRAMBLE_INT_ORDER(5)]); }
|
||
|
// #endif
|
||
|
// #if defined(INT6_vect) && CORE_NUM_INTERRUPT > 6
|
||
|
// ISR(INT6_vect) { Encoder::update(Encoder::interruptArgs[SCRAMBLE_INT_ORDER(6)]); }
|
||
|
// #endif
|
||
|
// #if defined(INT7_vect) && CORE_NUM_INTERRUPT > 7
|
||
|
// ISR(INT7_vect) { Encoder::update(Encoder::interruptArgs[SCRAMBLE_INT_ORDER(7)]); }
|
||
|
// #endif
|
||
|
// #endif // AVR
|
||
|
// #if defined(attachInterrupt)
|
||
|
// // Don't intefere with other libraries or sketch use of attachInterrupt()
|
||
|
// // https://github.com/PaulStoffregen/Encoder/issues/8
|
||
|
// #undef attachInterrupt
|
||
|
// #endif
|
||
|
// #endif // ENCODER_OPTIMIZE_INTERRUPTS
|
||
|
|
||
|
|
||
|
// #endif
|